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| NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor (Preliminary) P8503BMG SOT-23 Lead Free D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 85m[ ID 3A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Power Dissipation 1 SYMBOL VGS LIMITS 20 3 2 UNITS V TC = 25 C TC = 100 C ID IDM A 20 0.6 0.5 W TC = 25 C TC = 100 C PD Tj, Tstg TL Operating Junction & Storage Temperature Range Lead Temperature (1/16" from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 2 -55 to 150 275 C SYMBOL RJC RJA TYPICAL MAXIMUM 65 230 UNITS C / W Pulse width limited by maximum junction temperature. Duty cycle 1% ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current 1 Drain-Source On-State Resistance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = 20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 C VDS = 10V, VGS = 10V VGS = 4.5V, ID = 1.5A VGS = 10V, ID = 3A 3 70 48 115 85 25 0.8 1.2 2.5 100 1 10 A m[ nA A V LIMITS UNIT MIN TYP MAX 1 Nov-03-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor (Preliminary) P8503BMG SOT-23 Lead Free Forward Transconductance1 gfs VDS = 15V, ID = 3A DYNAMIC 16 S Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 Ciss Coss Crss Qg Qgs Qgd 2 450 VGS = 0V, VDS = 15V, f = 1MHz 200 60 15 VDS = 0.5V (BR)DSS, VGS = 10V, ID = 3A 2.0 7.0 6.0 VDS = 15V, RL = 1[ ID 3A, VGS = 10V, RGS = 2.5[ 6.0 20 5.0 nS nC pF Gate-Source Charge2 Gate-Drain Charge2 Turn-On Delay Time Rise Time 2 td(on) tr td(off) tf Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C) Continuous Current Pulsed Current 3 Forward Voltage1 1 2 IS ISM VSD IF = IS, VGS = 0V 2.3 4.6 1.5 A V Pulse test : Pulse Width 300 sec, Duty Cycle 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH "10YWW", DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXXG parts name 2 Nov-03-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor (Preliminary) P8503BMG SOT-23 Lead Free SOT-23 (M3) MECHANICAL DATA mm Dimension Min. A B C D E F G 0.85 2.4 1.4 2.7 1 0 0.35 1.6 2.9 1.1 Typ. Max. 1.15 3 1.8 3.1 1.3 0.1 0.5 H I J K L M N Dimension Min. 0.1 0.37 Typ. 0.15 Max. 0.25 mm H 2 C 1 A 3 B I D E G F 3 Nov-03-2004 |
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